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RISPP: A Run-time Adaptive Reconfigurable Embedded Processor
Abstract
This Ph.D. thesis describes a new approach for adaptive processors using a reconfigurable fabric (embedded FPGA) to implement application-specific accelerators. A novel modular Special Instruction composition is presented along with a run-time system that exploits the provided adaptivity. The approach was simulated and prototyped using and FPGA. Comparisons with state-of-the-art appl.-specific and reconf. processors demonstrate significant improvements according the performance and efficiency- doc-type:doctoralThesis
- Text
- info:eu-repo/semantics/doctoralThesis
- dissertation
- info:eu-repo/semantics/publishedVersion
- Reconfigurable Processor
- Application Specific Processor
- ASIP
- Run-time Adaptivity
- Run-time System
- FPGA
- Efficiency
- Performance
- Special Instruction
- ddc:004
- DATA processing & computer science
- info:eu-repo/classification/ddc/004
Similar works
This paper was published in KITopen.
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