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A technology based complexity model for reversible Cuccaro ripple-carry adder

Abstract

Reversible logic provides an alternative to classical computing, that may overcome many of the power dissipation problems. The paper presents a simple complexity model, from the study of a cascade of Cuccaro adders processed in standard 0.35 micrometer CMOS technology

Similar works

This paper was published in Ghent University Academic Bibliography.

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