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oaioai:casi.ntrs.nasa.gov:19720012530

Monolithic parallel processor, phase 1A

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    Publication date
    1971
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    Abstract

    A four-bit parallel processor LSI array was designed and fabricated using COS/MOS integrated-circuit technology. The design features include the provision for interconnecting groups of parallel-processor chips to form an expanded processor of any desired word length. This 800-transistor "computer on a chip' circuit has the logic capability of a medium-size, medium-speed, general-purpose computer suitable for sophisticated scientific data processing. The ability to fabricate this device repetitively was demonstrated

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    This paper was published in NASA Technical Reports Server.

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