A 177 ppm RMS Error-Integrated Interface for Time-Based Impedance Spectroscopy of Sensors

Abstract

This paper presents an integrated circuit for time-based electrical impedance spectroscopy (EIS) of sensors. The circuit exploits maximum-length sequences (MLS) in order to perform a broadband excitation of the sensors under test. Therefore, the measured time-domain EIS is obtained by cross-correlating the input with the output of the analog front end (AFE). Unlike the conventional digital approach, the cross-correlation operation is performed in the analog domain. This leads to a lower RMS error in the measured time-domain EIS since the signal processing is not affected by the quantization noise of the analog-to-digital converter (ADC). It also relaxes the sampling frequency of the ADC leading, along with the lack of random access memory (RAM) usage, to a reduced circuit complexity. Theoretical concepts about the circuit’s design and operation are presented, with an emphasis on the thermal noise phenomenon. The simulated performances are shown by testing a sensor’s equivalent model composed of a 50 kΩ resistor in parallel with a 100 (Formula presented.) (Formula presented.) capacitor. A time-based EIS output of 255 points was obtained with a maximum tested frequency of 500 (Formula presented.) (Formula presented.) and a simulated RMS error of 0.0177% (or 177 ppm)