A method for the suppression of fluctuations in the neutral-point potential of a three-level NPC inverter with a capacitor-voltage loop

Abstract

This paper investigates the problem of fluctuation of the neutral-point potential (NPP) in a three-level NPC inverter with a capacitor-voltage loop. The phase pulse width duty cycle disturbance PWM method is proposed to suppress the NPP fluctuation efficiently. Based on the basic carrier-based Phase Disposition (PD) PWM method, the average pulse neutral-point current model is established. Then the frequency, amplitude and equivalent initial phase of the NPP fluctuation are analyzed based on the current model. According to the alternating error of the DC-link capacitor voltages, a capacitor-voltage loop with a quasi PR (proportional resonant) controller is presented. The control variable, which varies with the modulation index, phase current, load power factor, etc, can be obtained from the quasi PR controller. Finally, an experimental three-level NPC inverter is described and the validity and feasibility of the proposed method are verified by experimental results