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Research in asynchronous circuit approach has been carried out recently when asynchronous circuits are presented more widely in electronic systems. As they are more important in human life, their correctness should be considered carefully. Although there are some EDA tools for design and synthesis of asynchronous circuits, they are lack of methods for verifying the correctness of the produced circuits. In this work, we are about to propose a verification method and apply it in making a new version of the PAiD tool that can enable engineers to design, synthesize and verify asynchronous circuits. Experiments in verifying circuits have been also provided in this work
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