FPGA Implementation of Low Power Serial to High Speed Data Networks

Abstract

FPGA based solutions become more common in embedded systems these days. These systems need to communicate with external world. Considering high-speed and popularity of Ethernet communication, developing a reliable real-time Ethernet component inside FPGA is of special value. To that end, we present a new solution for FPGA Gigabit Ethernet communications with timing analysis. The solution deals with "Gigabit Media-Independent Interface" in its physical layer. Network protocol is implemented from physical to transport layer which is UDP. In this Project using LAN connection various data will be captured by FPGA and will be sent on a serial line. Read the data from UART Receive and transform the data in it. On FPGA logic is implemented to read data from serial port. Write data in to memory location and transmitted data out put The FPGA module takes data from serial port and sends to PC in Ethernet form. In PC application will be developed to read data from Ethernet