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A polymorphic hardware platform
Abstract
In the domain of spatial computing, it appears that platforms based on either reconfigurable datapath units or on hybrid microprocessor/logic cell organizations are in the ascendancy as they appear to offer the most efficient means of providing resources across the greatest range of hardware designs. This paper encompasses an initial exploration of an alternative organization. It looks at the effect of using a very fine-grained approach based on a largely undifferentiated logic cell that can be configured to operate as a state element, logic or interconnect - or combinations of all three. A vertical layout style hides the overheads imposed by reconfigurability to an extent where very fine-grained organizations become a viable option. It is demonstrated that the technique can be used to develop building blocks for both synchronous and asynchronous circuits, supporting the development of hybrid architectures such as globally asynchronous, locally synchronous- Conference Paper
- Circuits and Systems
- asynchronous circuits
- parallel architectures
- reconfigurable architectures
- fine-grained approach
- globally asynchronous architectures
- hybrid architectures
- interconnect
- locally synchronous architectures
- polymorphic hardware platform
- reconfigurability
- spatial computing
- state element
- synchronous circuits
- undifferentiated logic cell
- vertical layout style