Implementing Synthetic Aperture Radar Backprojection in Chisel – A Field Report

Abstract

Chisel is an emerging hardware description language which is especially popular in the RISC-V community. In this report, we evaluate its application in the field of general digital hardware design. A dedicated hardware implementation of a Synthetic Aperture Radar (SAR) processing algorithm is used as an example case for a real-world application. It is targeting a modern high performance FPGA platform. We analyze the difference in code size compared to a VHDL implementation. In contrast to related publications, we classify the code lines into several categories, providing a more detailed view. Overall, the number of lines was reduced by 74% while the amount of boilerplate code was reduced by 83%. Additionally, we report on our experience using Chisel in this practical application. We found the generative concept and the flexibility introduced by modern software paradigms superior to traditional hardware description languages. This increased productivity, especially during timing closure. However, additional programming skills not associated with classic hardware design are required to fully leverage its advantages. We recommend Chisel as a language for all hardware design tasks and expect its popularity to increase in the future